Serial Front Panel Data Port (sFPDP) IP Core
The New Wave Design and Verification sFPDP core provides a complete IP solution for the VITA 17.3-2018 sFPDP specification. sFPDP is a high-speed, low-overhead, point-to-point communication protocol commonly used in data intensive processing applications such as Radar and Medical Imaging.
The core includes all functionality needed to meet the framing and signaling specification of sFPDP including: comma alignment, 8b/10b encode/decode, primitive decode, port state machine, CRC generation/checking, elastic FIFO, and phase FIFO.
At the physical layer, the core is built for connecting to ASIC/FPGA embedded SERDES or discrete SERDES parts. The user interface of the core provides an intuitive streaming interface for application designers. The user interface within the core also includes crossclocking logic making integration into the larger design extremely simple.
This core has been used on a diverse set of applications, from medical imaging to aerospace electronics, and on a wide range of parts at varying operating rates. The core comes with test-benches and example code, making design integration a straightforward task.
Get This IP Core Pre-Loaded on the Following FPGA Cards:
- Supports 1/2/2.5/10 Gigabit sFPDP rates
- Adheres to VITA 17.3-2018
- Complete hardware-based protocol offload
- High performance full-bandwidth operation
- Intuitive streaming user interface
- Scales for multiple port designs
- Accelerates FPGA application development time-to-market
- Leverage proven technology for standard interface implementation
- Lower development costs
Xilinx: Virtex, Kintex, Artix FPGAs
Altera: Stratix, Arria, Cyclone FPGAs
Microsemi: SmartFusion2, Igloo2 FPGAs
- Radar, Imaging, Sonar Interfaces
- Digital Signal Processors
- Medical Imaging and Diagnostics
|Block Diagram||sFPDP Block Diagram|