Mil1394 OHCI Link Layer Controller IP Core
The New Wave DV Mil1394 OHCI Link Layer IP Core provides a complete IP solution for the OHCI layer of the Mil1394 protocol.
The core includes all functionality needed to meet the Mil1394 specification including: Asynchronous Transmit, Isochronous Receive, Start of Frame (STOF) handling, STOF regulated transmit functions, Self ID, and CRC generation/checking.
At the PHY-Link interface, the core is built for connecting to any PHY implementing the defined standard PHY-Link interface. This interface is compatible with the New Wave DV PHY IP core as well as discrete
This core is targeted towards Mil1394 aerospace applications and has been used on a wide range of parts at varying operating rates. The core comes with test-benches and example code, making design integration a straightforward task.
Evaluation versions of the OHCI Link Layer IP Core are available and New Wave DV has a set of standard form factor boards featuring FPGAs, 1394b connectors and transformers, and off-the-shelf reference designs for quick evaluation of the OHCI Link Layer IP Core.
Get This IP Core Pre-Loaded on the Following FPGA Cards:
V1142 (4-Port) V1144 (12-Port) V1146 (9-Port) V5054 (30-Port)
- AS5643 compliant interface with hardware-based STOF offload
- Supports S100/S200/S400 data rates
- Configurable number of OHCI nodes in a single FPGA
- AXI-based host interface for embedded or PCIe based processors
- Standard PHY-Link interface
- Increase interface port density while reducing interface size and power
- Increased performance with hardware-based AS5643 offload
- Additional diagnostics and programmable operation features
- Leverage proven technology for standard interface implementation
AMD (Xilinx): Virtex, Kintex, Artix, Zynq FPGAs
Intel (Altera): Stratix, Arria, Cyclone FPGAs
Microchip (Microsemi): SmartFusion2, Igloo2 FPGAs
- Vehicle System – Remote Node
- Vehicle System – Vehicle Management Computer
- Avionic Mission Systems