FC Upper Layer Protocol (ULP) IP Core
The New Wave DV Fibre Channel Upper Layer Protocol (FC-ULP) core provides a complete FC-4 layer hardware IP solution for the Fibre Channel Avionics Environment Remote Direct Memory Access (FC-AE-RDMA) and Fibre Channel Audio Video (FC-AV) protocols. FC-AE-RDMA follows the Fibre Channel Protocol for SCSI (FCP) standard.
The core provides full FC-AE-RDMA and FC-AV compliance. The host interface to the core is AXI-MM. This allows the core to be connected to an external host processor over PCIe or to an embedded SoC processor. The core is built for dropping into an FPGA and providing the complete design from processor interface to FC-ULP network interface.
This core is targeted towards applications in military/aerospace and has been used on a wide range of parts at varying operating rates. The core comes with test benches, constraints and an example design, making design integration a straightforward task.
Evaluation versions of the FC-ULP IP core are available and New Wave DV has a set of standard form factor boards featuring FPGAs, Fibre Channel optics, and off-the-shelf reference designs for quick evaluation of the IP core.
Get This IP Core Pre-Loaded on the Following FPGA Cards:
XMC: V1151 (Quad-Port), V1152 (12-Port), V1153 (12-Port Rugged), V1163 (12-Port Rugged ACAP)
PCIe: V5051 (Quad-Port), V5052 (16-Port)
PXIe: NI-PXIe-6592 (Please request more information)
Features
- FC-AE-RDMA & FC-AV compliant interface with hardware-based offload
- Hardware DMA engines map sequence data to host memory buffers
- Host processor offloaded from all networking responsibilities
- Supports 1/2/4 Gbs data rates
- Configurable number of ports in a single FPGA
- AXI-MM host interface for embedded or PCIe-based processors
- Frame counter and error statistics
Benefits
- Increased performance with hardware-based FC-ULP offload
- Hardware-based message processing and host DMA setup
- Leverage proven technology for standard interface implementation
- Mitigate obsolescence
SpecificationsSpecs
Supported FPGA Devices |
Xilinx: Virtex, Kintex, Artix Intel (Altera): Stratix, Arria, Cyclone Microsemi: SmartFusion2, Igloo2 |
Supported Rates |
1.0625 / 2.125 / 4.25 Gbs |
Fabric Clock Operating Frequencies |
1G: 26.5625 MHz 2G: 53.125 MHz 4G: 106.25 MHz |
Applications App
- Avionics vehicle and mission systems
- Industrial/Machine vision systems
- Network packet capture
Documentation Doc
Datasheet | Fibre-Channel-Upper-Layer-Protocol-ULP-IP-Core-Datasheet |
Block Diagram | Fibre-Channel-ULP-Core-Block-Diagram |