NI PXIe-7902 Serial RapidIO® Test Solution
The Serial RapidIO® Test Instruments integrates up to six independent Serial RapidIO® (sRIO®) interfaces into the LabVIEW environment using the PXIe-7902 card. The FPGA core is designed and optimized for test/verification applications and is available with LabVIEW support or Windows C API and can be integrated into LabVIEW TestStand. The Test Instrument can be operated in two modes: In interface mode, the user can control the sRIO® interfaces in real time via software. Test mode is conducted via scripted operations where the user specifies all facets of the transaction including header info, payload, packet type, and cadence/timing of operations before handing off execution to the hardware. During both modes, all incoming and outgoing packets are time stamped, recorded and logged for user review.
See This sRIO® Test Solution in Action (VIDEO):
Testing ARINC 818 and Other High-Speed Avionics Buses w/ NI and New Wave DV (WATCH)
Features
- Fully-programmable sRIO® traffic patterns
- Hardware offload of performance critical traffic flows
- Script engine defines transaction mix, hardware executes script at wire speed
- Automatic response generation and response processing
- Hardware transmit and receive logs with time-stamping
- 512MB of on-board memory per port
- Packet Support:
- Type 2 (NREAD non-atomic)
- Type 5 (NWRITE, NWRITE_R non-atomic)
- Type 6 (SWRITE)
- Type 8 (Maintenance)
- Type 9 (Data Streaming)
- Type 10 (Doorbell)
- Type 11 (Data Message)
- User-defined Packets
- 8-bit and 16-bit DevID
- Error detection and injection
- Windows C or LabVIEW API and example designs
Benefits
- Directly control and interface with SRIO® devices in LabVIEW
- Configurable as host or device
- User-configurable number of lanes and lane speed at run time
- DMA access to read/write port memory
- Records and logs all transactions with hardware time-stamping
- Complete FPGA design with FPGA-based offload of protocol; No FPGA design needed by user
- Reduce development time by focusing on software test applications instead of test hardware development
SpecificationsSpecs
Network Interface |
Six Mini-SAS HD (4), 24 total lanes |
Protocol |
Serial RapidIO® (sRIO®) |
FPGA Device |
Xilinx Virtex 7 (XC7VX485T) |
Memory |
One bank of 2GB DDR3 DRAM |
Host Interface |
PXI Express (Gen2) x8 |
External Interface |
4 SMB for strobes and PPS |
Compliance |
PXI Express v1.0 |
Dimensions |
130 mm (width) x 183 mm (length) x 20 mm (thickness) |
Power Requirements |
Maximum 38,25W |
Tempurature |
Operating: 0˚C to 40 ˚C Storage: -40˚C to 71˚C |
Applications App
- Functional test and performance characterization of sRIO® equipment
- Emulation/simulation of sRIO® equipment and systems