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NI PXIe-6593 Serial RapidIO® Protocol Test Solution

The NI PXIe-6593 Serial RapidIO® Protocol Solution for LabVIEW™ is exclusively available on the National Instruments 6593 card. The SRIO Protocol Solution for LabVIEW™ is a flexible tool for test environments that allows the user to record up to 2 simultaneous channels of SRIO. The design is based around the widely utilized PCAP file format for file I/O that allows the user to leverage a wealth of open-source tools and guides to view and analyze captured data.

The SRIO Protocol Solution for LabVIEW™ has two fully functional and independent SRIO endpoints. Each SRIO port is automatically managed and maintained by the FPGA and requires no host/software interaction. The FPGA updates and maintains its memory bank (2GB per port) based on SRIO transactions. The port memory can be accessed asynchronously at any time by the host. The design provides a way to have a SRIO device completely integrated into LabVIEW™ without the software overhead of maintaining the link.

The endpoint processes and responds to requests without host/software intervention. The on-board memory is updated with incoming NWRITE and Message packets. NWRITE operations are stored at the addressed location while Message packets are stored in a circular buffer.

Packet generation can be configured to be regular and periodic (hardware offload mode) or driven by the host software. When in hardware offload mode, data generation is handled by a scripting-based hardware offload engine. The user defines a script that determines the format and timing of any data transmission. The script is executed completely in hardware which gives the user a very high degree of precision and control in creating data transmission patterns.

Optionally, the system can be operated as a standalone instrument and controlled remotely via a network connection. Command and control is handled via plain text UDP commands which allows integration into test systems running C#, C++, Python, and more.

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NI PXIe-6593 Serial RapidIO® Protocol Test Solution Overview

The NI PXIe-6593 Serial RapidIO® Protocol Solution for LabVIEW is exclusively available on the National Instruments 6593 card. The SRIO Protocol Solution for LabVIEW is a flexible tool for test environments that allows the user to record up to 2 simultaneous channels of SRIO. The design is based around the widely utilized PCAP file format for file I/O that allows the user to leverage a wealth of open-source tools and guides to view and analyze captured data.

The SRIO Protocol Solution for LabVIEW has two fully functional and independent SRIO endpoints. Each SRIO port is automatically managed and maintained by the FPGA and requires no host/software interaction. The FPGA updates and maintains its memory bank (2GB per port) based on SRIO transactions. The port memory can be accessed asynchronously at any time by the host. The design provides a way to have a SRIO device completely integrated into LabVIEW without the software overhead of maintaining the link.

The endpoint processes and responds to requests without host/software intervention. The on-board memory is updated with incoming NWRITE and Message packets. NWRITE operations are stored at the addressed location while Message packets are stored in a circular buffer.

Packet generation can be configured to be regular and periodic (hardware offload mode) or driven by the host software. When in hardware offload mode, data generation is handled by a scripting-based hardware offload engine. The user defines a script that determines the format and timing of any data transmission. The script is executed completely in hardware which gives the user a very high degree of precision and control in creating data transmission patterns.

Optionally, the system can be operated as a standalone instrument and controlled remotely via a network connection. Command and control is handled via plain text UDP commands which allows integration into test systems running C#, C++, Python, and more.

NI PXIe-6593 Serial RapidIO® Protocol Data Recorder Features

  • sRIO transmit and receive
  • sRIO error and status information
    Self-test
  • Remote access interface
  • Dynamic Reconfiguration Port provides access to transceivers for eye-diagram generation
  • PRBS-control with error injection

NI PXIe-6593 Serial RapidIO® Protocol Data Recorder Applications

  • LabVIEW integrated SRIO host or endpoint
  • Record SRIO data to disk for analysis or diagnosis
  • Record large volumes of sensor data for characterization
  • Script-based data generation for emulation of sensors and systems

NI PXIe-6593 Serial RapidIO® Protocol Data Recorder Benefits

  • Full hardware offload of SRIO endpoint
  • Flexible test config with software/LabVIEW control of test instrument
  • View, analyze, or create SRIO data using PCAP natively in LabVIEW or with a wide variety of open-source tools
  • Complete FPGA design with FPGA-based offload of protocol. No FPGA design needed by the user
  • Reduce development time by focusing on software test applications instead of test hardware development
  • Lower total cost of test development and test system operation

NI PXIe-6593 Serial RapidIO® Protocol Test Solution Overview

The NI PXIe-6593 Serial RapidIO® Protocol Solution for LabVIEW is exclusively available on the National Instruments 6593 card. The SRIO Protocol Solution for LabVIEW is a flexible tool for test environments that allows the user to record up to 2 simultaneous channels of SRIO. The design is based around the widely utilized PCAP file format for file I/O that allows the user to leverage a wealth of open-source tools and guides to view and analyze captured data.

The SRIO Protocol Solution for LabVIEW has two fully functional and independent SRIO endpoints. Each SRIO port is automatically managed and maintained by the FPGA and requires no host/software interaction. The FPGA updates and maintains its memory bank (2GB per port) based on SRIO transactions. The port memory can be accessed asynchronously at any time by the host. The design provides a way to have a SRIO device completely integrated into LabVIEW without the software overhead of maintaining the link.

The endpoint processes and responds to requests without host/software intervention. The on-board memory is updated with incoming NWRITE and Message packets. NWRITE operations are stored at the addressed location while Message packets are stored in a circular buffer.

Packet generation can be configured to be regular and periodic (hardware offload mode) or driven by the host software. When in hardware offload mode, data generation is handled by a scripting-based hardware offload engine. The user defines a script that determines the format and timing of any data transmission. The script is executed completely in hardware which gives the user a very high degree of precision and control in creating data transmission patterns.

Optionally, the system can be operated as a standalone instrument and controlled remotely via a network connection. Command and control is handled via plain text UDP commands which allows integration into test systems running C#, C++, Python, and more.

NI PXIe-6593 Serial RapidIO® Protocol Data Recorder Features

  • sRIO transmit and receive
  • sRIO error and status information
    Self-test
  • Remote access interface
  • Dynamic Reconfiguration Port provides access to transceivers for eye-diagram generation
  • PRBS-control with error injection

NI PXIe-6593 Serial RapidIO® Protocol Data Recorder Applications

  • LabVIEW integrated SRIO host or endpoint
  • Record SRIO data to disk for analysis or diagnosis
  • Record large volumes of sensor data for characterization
  • Script-based data generation for emulation of sensors and systems

NI PXIe-6593 Serial RapidIO® Protocol Data Recorder Benefits

  • Full hardware offload of SRIO endpoint
  • Flexible test config with software/LabVIEW control of test instrument
  • View, analyze, or create SRIO data using PCAP natively in LabVIEW or with a wide variety of open-source tools
  • Complete FPGA design with FPGA-based offload of protocol. No FPGA design needed by the user
  • Reduce development time by focusing on software test applications instead of test hardware development
  • Lower total cost of test development and test system operation

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