1394b PHY IP Core
The New Wave Design and Verification (New Wave DV) 1394b PHY core includes all functionality needed to meet the AS5643 protocol, and provides a complete IP solution for the PHY layer of the 1394b. The 1394b core includes all functionality needed to meet the 1394b and AS5643 support specification, including: comma alignment, 8b/10b encode/decode, primitive decode, scrambling, port state machine, connection manager, arbitration controller, elastic FIFO, and phase FIFO.
At the physical layer, the core of 1394b is built for connecting to FPGA/ASIC embedded SERDES, discrete SERDES parts, or general-purpose IO with AS5643 performance protocol. The Link Layer interface of 1394b PHY IP’s core provides the industry standard PHY-Link interface. This PHY-Link interface connects directly to New Wave DV’s Link Layer IP cores, discrete Link Layer integrated circuits, or to custom logic developed by the end user.
Our 1394b core includes AS5643 performance protocol functionality, and is targeted towards applications in aerospace and industrial vision. The 1394 b core has also been used on a wide range of parts at varying operating rates. Additionally, our 1394b core includes AS5643 support protocol, and includes test-benches, and example code, which helps to make design integration as straightforward as possible.
- AS5643 compliant interface
- Supports S100/S200/S400/S800/S1600/S3200 data rates
- Complete PHY layer implementation
- Configurable number of ports per PHY instantiation
- Configurable number of PHYs in a single FPGA Standard PHY-Link interface
- Increase interface port density while lowering size and power
- Additional diagnostics and programmable operation features
- Leverage proven technology for standard interface implementation
Xilinx: Virtex, Kintex, Artix FPGAs
Intel (Altera): Stratix, Arria, Cyclone FPGAs
Microsemi: SmartFusion2, Igloo2 FPGAs
S3200: 196.608Mhz (double data width)
- Avionics vehicle and mission systems
- Industrial/Machine vision systems