1394b PHY IP Core

The New Wave Design and Verification (New Wave DV) 1394b PHY core provides a complete IP solution for the PHY layer of the 1394b protocol. The core includes all functionality needed to meet the 1394b specification including: comma alignment, 8b/10b encode/decode, primitive decode, scrambling, port state machine, connection manager, arbitration controller, elastic FIFO, and phase FIFO.

At the physical layer, the core is built for connecting to FPGA/ASIC embedded SERDES, discrete SERDES parts, or general purpose IO. The Link Layer interface of the core provides the industry standard PHY-Link interface. This PHY-Link interface connects directly to Link Layer IP cores from New Wave DV, to discrete Link Layer integrated circuits, or to custom logic developed by the end user.

This core is targeted towards applications in aerospace and industrial vision, and has been used on a wide range of parts at varying operating rates. The core comes with test-benches and example code, making design integration a straightforward task.

Get This IP Core Pre-Loaded on the Following FPGA Cards:
V1142 (4-Port)     V1144 (12-Port)     V1146 (9-Port)


  • AS5643 compliant interface
  • Supports S100/S200/S400/S800/S1600/S3200 data rates
  • Complete PHY layer implementation
  • Configurable number of ports per PHY instantiation
  • Configurable number of PHYs in a single FPGA Standard PHY-Link interface


  • Increase interface port density while lowering size and power
  • Additional diagnostics and programmable operation features
  • Leverage proven technology for standard interface implementation


Supported Devices

Xilinx: Virtex, Kintex, Artix FPGAs

Intel (Altera): Stratix, Arria, Cyclone FPGAs

Microsemi: SmartFusion2, Igloo2 FPGAs

Supported Rates


Operating Frequencies

S100: 12.288Mhz

S200: 24.576MHz

S400: 49.152MHz

S800: 98.304Mhz

S1600: 196.608Mhz

S3200: 196.608Mhz (double data width)


  • Avionics vehicle and mission systems
  • Industrial/Machine vision systems